Why Advanced Packaging Scarcity Masks a Crucial Truth: The Individual Memory Moat is Temporally Finite

High Bandwidth Memory (HBM) , a type of dense, vertically stacked DRAM, has become critical to the AI era. Only three companies in the world can manufacture it. Only one packaging facility can assemble it at scale. Demand is already sold out through to 2026. In this post, I will attempt to determine whether Micron has a moat, and if so, where is it.

How are HBM built?

3D-stacked DRAM or HBM is not a monolithic chip. Rather, it is a vertically integrated stack of DRAM dies connected by microscopic copper pillars that traverse the silicon. This technology is called Through-Silicon Vias (TSVs) and enables direct die-to-die communication.

Rather than being “closer” in the traditional sense, HBM is co-packaged with the processor, typically on a silicon interposer, which significantly shortens signal paths. Its key advantage lies in its wide memory interfaces, which consist of thousands of parallel I/Os operating at lower speeds. This configuration delivers very high aggregate bandwidth with improved energy efficiency per bit. While this architecture comes with higher manufacturing and packaging costs, it reduces power consumption per unit of data transferred and then, TCO.

Each new generation of HBM increases the complexity further. HBM2 stacks four to eight DRAM dies; HBM3/3E pushes this to eight or twelve; HBM4 will stack up to sixteen, increasing manufacturing difficulty and raw material consumption at every level.

HBM it’s a form of DRAM and Micron states HBM and conventional DRAM as the same which represents 79% of their sales. Nand on the other hand y is a even lower margin business that accounts as 21%.

Pricing Power: Is this a Spot Market?

Recently Micron and other memory vendors are locking in multi-year agreements, committing future HBM output well in advance a pattern inconsistent with traditional cyclical memory markets.

For instance, Sanjay Mehrotra from Micron said in the Fiscal Second Quarter 2026 Financial Conference Call:

We continue to work with customers on strategic customer agreements or SCAs that are different from prior LTAs and have specific commitments over a multi-year time horizon for improved visibility and stability in our business model. These SCAs also provide customers greater certainty to plan their businesses while reinforcing long‑term engagement across our broad product portfolio. We are excited to have signed our first five-year SCA.

Is this anecdotical or structural?

The memory sector tends to fill the gap with excessive supply. Periods of tight supply are often followed by aggressive capacity expansion. This is complicated by the fact that increased capacity takes time to come online and must be estimated in advance (by 1–2 years).

For instance, SK Hynix’s CFO stated publicly that the company has “already sold out its entire 2026 HBM supply.”

Unlike the airline industry, where multiple competitors offer a largely commoditized product. The memory chips it is an industry with high barriers to entry, dominated by only three competitors.

We can identify the moment when Micron began showing signals of price increase in recent three quarters. Before that, margins remained flat.

However, if we look further back, we can see their cyclical nature in 2023 gross margin reduction. Additionaly, management in the 2023 10Q said:

Our consolidated gross margin percentage decreased primarily due to […] to declines in average selling prices for both DRAM and NAND and charges to write down inventories (as detailed in “Inventory NRV write-downs” below), and $382 million of facility underutilization costs in 2023.

In other words, they were selling below their cost of production.

Micron’s HBM elasiticity and Potential substitutes

So, is HBM price elastic or inelastic? Are there substitutes?

It seems 3D DRAM prices are structurally inelastic in the short to medium term, and potential substitutes exist only in theory. Lets dive with the options:

1. Back to conventional DRAM :

This is a downgrade and the subsitutes are exactly the same providers (Samsung, SK Hynix and Micron).

2. Redefine the chip arquitecture

As we said in our last article, hyperscalers are building their own chips with higher speed and performance. However, they are not trying to replace the dependecy of 3D RAM. In fact, Google’s Trillium, which power their most advanced models such as Gemini has within new features 2X the High Bandwidth Memory (HBM) capacity!

For now, the verdict is: HBM is inelastic on the demand side and constrained on the supply side. The structural bottleneck is not just in the memory fabs, as we will see.

Micron’s apparent pricing power is in fact product of supply undercapacity

According to Pat Dorsey, there are four key sources of moats: intangible assets, high switching costs, network effects, and cost advantages.

One of the attributes of a moat company is its ability to raise prices without losing customers, which is widely considered the truest indicator of an “economic moat.” This attribute acts as a defensive shield, allowing a company to pass on inflation-driven costs to consumers while maintaining high, sustainable profit margins.

Are DRAM key players raising prices year after year?

According to sources, Samsung Electronics and SK Hynix have increased HBM3E supply prices by almost 20% for 2026.

Also, Micron’s CEO Sanjay Mehrotra confirmed the same:

“Our HBM capacity for calendar 2025 and 2026 is fully booked.”

In the case of Samsung, there are no detailed records of margins for the HBM segment. However, they mentioned that the Memory Business achieved “record highs” in quarterly revenue and operating profit in Q4 2025 by addressing strong conventional DRAM demand and expanding HBM sales amid an overall increase in prices.

This just looks like a manufacturer that increased their prices due to “fully booked capacity”.

In fact, saying that HBM’s producers are the only reason behind the underproduction is incomplete because other factors should be considered. The process also relies on packaging, specifically the CoWoS (Chip-on-Wafer-on-Substrate) process, which only TSMC performs on a large scale. This means that even if HBM suppliers increase production, deployment is ultimately limited by packaging capacity, not just memory production. For instance, TSMC’s CEO C.C. Wei stated publicly:

Our CoWoS capacity is very tight and remains sold out through 2025 and into 2026.

On the other hand, Nvidia management has confirmed the same constraint from the demand side:

CoWoS assembly capacity is oversubscribed through at least mid-2026.

CoWoS scarcity has quietly become a market entry barrier not just for HBM producers, but for anyone trying to build AI accelerators outside the established supply chain.

But there is a catch, we’re talking of three producers, only three, and as we’ll see its not that simple to produce 3D RAM.

The HBM oligopoly

The HBM industry is concentrated and mainly consists of three companies. SK Hynix holds more than 50% of the market, followed by Samsung with 30-35% and Micron with 15-20%.

Nvidia relies primarily on SK Hynix for its Blackwell GPUs, which dominates the market. This trend increased further when Samsung failed to pass stringent qualification tests.

Are there any competitors outside of these three incumbents? Technically, yes. In the second quarter of 2025, China’s CXMT held a 4% share of the global conventional DRAM (not HBM) market.

The Reproduction Cost: What It Actually Takes to Enter

These barriers of entry aren’t patents or capital alone; they are accumulated manufacturing knowledge that takes a decade to build.

The most direct way to understand HBM’s barriers to entry is to answer the following question: What would it cost to build a credible HBM competitor from scratch today? In other words, what is the reproduction cost for new entrants?

Columbia professor Bruce Greenwald defines barriers to entry in terms of reproduction cost. If a new entrant can replicate an incumbent’s assets and capabilities at a similar cost and within a reasonable timeframe, then excess returns cannot persist. In industries where reproduction is prohibitively expensive, slow, or uncertain, incumbents are structurally protected. This is not just about capital intensity but also the cost of recreating a system, which compounds over time and is often invisible on the balance sheet.

To tackle the question we have to understand that fabricating HBM’s has two components: (a) The tangible: the DRAM fab and packaging facilities; and (b) the intangibles: brands, patents and so on.

For the DRAM fab we can estimate. Micron, for instance, is spending $200 Billion to construct, before equipment, a fab in New Idaho

SK Hynix’s M15X in Cheongju their next-generation DRAM fab built specifically for HBM4 carries a separate investment of approximately $14 billion (20 trillion won).

But capital cost is not the primary barrier at this layer. The primary barrier is time. Construction lead times for greenfield fabs could take years (3-5 years), and the operating costs in North America and Europe run up to 35% higher than in Asia.

The barriers of entry in sum are:

• Extensive capital
• Customer qualification process (it could take years)
• Qualified people

The industry consists of only three players, creating strong structural barriers to entry due to massive capital expenditure (capex) requirements and steep learning curves. Despite this external moat, however, the market remains highly competitive internally. DRAM and NAND are largely commoditized products that are purchased primarily based on price and availability. As a result, the industry is protected from new entrants. However, it does not protect incumbents from intense competition among themselves.

The 2016 downturn was not a deliberate price war but rather the result of synchronized capacity expansions colliding with weaker demand. The resulting oversupply forced prices down, sometimes below cash costs, as producers prioritized utilization over margins.

Until new entrants or innovations that disrupt the industry emerge, these three market participants will enjoy all the pricing upsides of the cycle and suffer downturns like those in 2016 and 2023.

Switching cost

For instance, consider HBM3 as business example. For the HBM3, SK Hynix secured in march of 2024, as the first dominant suppluer for Nvidia.

But six months later, Micron announced this:

Micron is at the forefront of memory innovation to meet these needs and is now shipping production-capable HBM3E 12-high to key industry partners for qualification across the AI ecosystem.

One of their key industry partners was Nvidia.

For the case of Samsung, their deal was delayed becasue they didn’t comply with technical observations, but that doesn’t disqualified them.

Also, HBM products are developed under JEDEC standards, which mean they must follow certain protocols that allow compatibility across multiple vendors. However, compliance with the standard does not guarantee full interoperability, since every vendor must go through a vendor qualification process.

This mean first movers have an edge, but this tends to erode as time passes as the rest of suppliers complete the qualification process: (a) the memory chip tends to commoditize and (b) Chip designers and hyperscalers deliberately diversify their soruces and making them compete. Therefore, buyers has some degree of negotiation power.

This supports the idea that a moat exists at an industry level, but individually, the switching cost moat exist only for a period of time that takes the rest to qualify which tends to exist only for a period of time.

This gives us an important lesson on moats, not only is important the existence but their durability.

Conclusion

We can see HBM industry as an industry that has different and as circunstantial industry that is moving temporarily from commodity-like NAN and DRAM to supply to companies that are training models that require massive amounts of their products. This leads to three potential ideas that could move interchangeably:

• High barriers to entry based on capital and accumulated know-how create economies of scale that make it difficult for new entrants to compete.
• Since production expansion is inflexible, it can take one to two years for competitors to respond to demand signals with increased capacity, which can lead to mismatches.
• Although there is a moat that protects the entire memory chip industry, this doesn’t apply to individual companies. In fact, they compete ruthlessly with each other, and potential production gaps will be filled by others.
• Long term price contracts will only work until the hyperscalers see signals of overproduction and wont renew.
• Hyperscalers have demonstrated more dependency on DRAM and HBM producers, but nothing guarantees that disruptions in chip architecture or system design could reduce the intensity of HBM usage over time.
• Despite to potential consequences, the risk of potential misconduct or anti-competitive practices is always present.